Jobs at Blue Origin

Lead end-to-end ASIC/SoC design and verification for high-performance RF/modem SoCs: write requirements, design RTL (Verilog/SystemVerilog), verify modules/subsystems/SoC, integrate ARM cores and high-speed interfaces, optimize power/performance, support backend DFT/STA/LEC, perform FPGA flows and post-silicon bring-up, and use golden-reference models (Matlab/SystemC/C).

Lead end-to-end software architecture for a multi-orbit satellite communications constellation, spanning flight and ground systems. Own system interfaces, program-wide CI/CD, over-the-air update strategy, configuration/version management, and cross-domain standards. Drive risk assessments, scalability, resilience, and adoption of common tools while mentoring engineers and aligning architecture with hardware constraints and verification/validation needs.

Design and develop RF payload hardware for a high-capacity satellite communications constellation. Lead HDI PCB layout, power delivery design, EMI/crosstalk mitigation, hardware bring-up and lab debugging, and integrate high-speed digital logic with phased-array antenna systems through testing and lifecycle support.

Design and validate RF payload hardware for a high-throughput satellite constellation: HDI PCB layout, robust power delivery, EMI/noise mitigation, hardware bring-up, debugging and system-level lab testing, and integration with phased-array antenna systems across the product lifecycle.

Lead the technical vision for product integrity across reliability, thermal, structural, materials, and qualification. Pioneer physics-of-failure methods, predictive reliability and AI-driven engineering, define testing/validation frameworks, mentor technical leaders, and align cross-disciplinary teams to ensure hardware survives launch and long-duration space deployment.

Provide receptionist and office management support for the Cupertino location: greet visitors, manage badging and security protocols, maintain common areas and supplies, coordinate meetings, catering, and building services, and deliver administrative support to business units.

Lead the development and production of next-generation satellite communications payloads, managing a multidisciplinary team across hardware and software domains from concept to manufacturing.

The Principal Hardware Engineer will lead the design of hardware systems for a satellite communications platform, focusing on power distribution, signal integrity, and PCB design, while ensuring high-reliability and fault tolerance in space environments.

Provide high-trust executive support to the VP of TeraWave Operations: manage complex calendars, travel, confidential communications, event planning, and strategic projects while improving workflows and enabling cross-functional coordination across engineering, manufacturing, testing, and operations.

Design and implement SDN-driven networking for a large LEO/MEO satellite constellation. Develop routing, topology management, fast-reroute, traffic engineering, programmable datapaths, observability/telemetry, and self-healing logic while optimizing for latency, power, and mobility. Mentor junior engineers and collaborate with RF and silicon teams.

Design and implement SDN-driven network architecture for a multi-orbit satellite constellation. Develop routing, topology management, fast-reroute, traffic engineering, telemetry/observability, and packet-forwarding solutions optimized for time-varying LEO/MEO links, power and latency constraints. Collaborate with RF and silicon teams and mentor junior engineers.

Lead end-to-end design, analysis, fabrication, and flight qualification of high-frequency reflector antenna systems and mm-wave feed chains (71–86 GHz). Perform EM simulation, tolerance and thermal sensitivity studies, anechoic-chamber testing, vendor management, and cross-functional integration to meet stringent space RF requirements.

Design and verify FPGA-based modem and physical-layer implementations for space communications. Architect RTL for SoC FPGAs, implement DSP/modem functions, develop UVM/self-checking verification, perform timing closure and hardware bring-up, and support radiation-tolerant, high-reliability aerospace designs.

Lead the development of satellite communications ground systems, managing hardware, software, and systems engineering teams from concept to production.

Lead RTL-to-GDS physical implementation of SoCs for space applications, perform signoff closure (STA, PV, LEC, EM/IR), debug timing, integrate mixed-signal verification, develop PV runsets and flow automation, implement DFT, collaborate with front-end and analog teams, interface with foundries, and support post-silicon validation.

Design and layout complex multi-layer PCBs for mmWave/RF, high-speed digital, mixed-signal, and high-power systems. Perform stackup and routability studies, signal integrity analysis, create DRCs and fabrication/assembly documentation, work with fabricators/CMs, support board bring-up and space-environment design considerations.

Lead the design and implementation of high-performance PoP infrastructure, optimize networking software, and mentor engineering teams at Blue Origin.

Lead the design and development of mixed-signal subsystems, focusing on architecture, specifications, modeling, and integration for advanced communication and data conversion SoCs.

Lead end-to-end development of TeraWave FEIC mm-wave chipset family, coordinating internal teams and external vendors from architecture and multi-variant mask planning through tapeout, silicon bring-up, antenna co-development, testing, qualification, and production ramp while managing risks, schedules, and system-level RF interfaces.

Lead the IC packaging team to develop advanced packaging solutions, manage product cycles, and ensure design for manufacturability while collaborating on simulations and qualifications.