Jobs at NVIDIA

Manage sales and partnerships with Canadian higher education institutions, focusing on High-Performance Computing and AI solutions, driving revenue growth and strategic initiatives.

The Solutions Architect for AI Infrastructure at NVIDIA will define, deploy, and manage large-scale GPU systems, providing technical support and guidance to customers throughout the entire project lifecycle.

As a Networking Solutions Architect at NVIDIA, you will design and deploy AI infrastructure, optimize solutions, and collaborate with partners on high-performance networking.

The engineer will develop algorithms and optimizations for NVIDIA's LPX inference stack, focusing on compiler components, performance metrics, and collaboration with hardware teams.

As a Senior ASIC Design Engineer, you'll implement high-performance RTL, analyze architectural trade-offs, and collaborate across teams to deliver cutting-edge designs.

The role involves developing algorithms for inference optimization, building compiler components, and collaborating across teams to enhance performance on NVIDIA platforms.

As a Senior Formal Verification Engineer, you will verify ASICs using formal methods, collaborate multi-functionally, lead methodology enhancements, and mentor junior engineers while ensuring compliance and correctness.

Develop algorithms and optimizations for LPX inference and compiler stack, focusing on deep learning and performance enhancements across NVIDIA systems.

Develop and maintain hardware abstraction layers, core system libraries, drivers, and runtimes; improve reliability via automation and diagnostics; debug multi-component system issues; support hardware bring-up and NPI; collaborate with hardware, compiler, and operations teams; contribute to documentation and tooling.

You will verify ASIC design implementation, develop verification infrastructure, optimize verification flows, and collaborate with teams on advanced methodologies.

Lead deep-learning inference optimization for edge/autonomous systems: analyze models to operator/kernel level, benchmark and deploy TensorRT/compiler solutions on Jetson/DRIVE/ARM/GPU platforms, collaborate with compiler/runtime/hardware teams, and engage partners to deliver production-ready performance improvements.

Drive AI-enabled ASIC development methodology by identifying cross-stage bottlenecks, building data pipelines and metrics, creating automation and AI models, mentoring engineers, and evaluating advances in AI and EDA to improve predictability, convergence, and cycle time.