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Fidus Systems

Senior ASIC Designer

Job Posted 16 Days Ago Reposted 16 Days Ago
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Canada
Senior level
Canada
Senior level
The Senior ASIC Designer will develop ASIC designs, write specifications, and collaborate with teams while ensuring design verification and compliance.
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Description

Fidus Systems, a leading-edge electronic product development company specializing in ASIC, FPGA, signal integrity, software, hardware, and more, is seeking a highly skilled and experienced Senior ASIC Designer. This is an exciting opportunity to join a dynamic and supportive team that consistently exceeds expectations in delivering next-generation products for clients in emerging technology markets.

With over 4000 projects completed for over 400 customers in various industries since 2001, Fidus Systems has built a strong reputation for excellence in electronic product development. As a Premier Adaptive Computing Partner for AMD North America, Fidus leverages in-house expert knowledge and industry-leading tools to architect, design, and deliver cutting-edge solutions.

At Fidus, we value innovation, collaboration, and excellence. We offer a dynamic and supportive work environment where you will have the opportunity to work on cutting-edge projects in a variety of industries. Join our talented team and make a real impact in the world of electronic product development.

To learn more about Fidus Systems, please visit our Career Page:

Responsibilities:

  • Collaborate with cross-functional teams to define and develop ASIC designs that meet project requirements
  • Write clear and concise block level technical specifications
  • Develop RTL code complying with Client coding guidelines
  • Work with engineers on the design of an IP, subsystem, SOC, or chiplet
  • Responsible for running lint, and CDC (Clock Domain Crossing), debugging issues, and creating appropriate waivers,
  • Propose and develop interface / block level assertions
  • Interact with physical design engineers on synthesis / timing / physical closure
  • Interact with verification engineers on block level verification closure
  • Review and close code coverage with verification engineers

Requirements:

  • Knowledge of semiconductor ASIC design methodologies and flows, knowledge of verification methodologies and flows is a plus
  • Minimum of 5 years of experience in ASIC design and development
  • Expertise in designing and implementing complex digital and mixed-signal ASIC circuits
  • Proficiency in RTL coding and verification using industry-standard tools (e.g., Verilog, SystemVerilog, UVM)
  • Strong programming skills including object-oriented programming
  • Working experience with digital logic design and verification
  • Practical experience in Ethernet, DDR/LPDDR, HBM, Security, Networking, AXI, NOC, ARM CPU subsystems,
  • Demonstrate good analysis, problem-solving, and critical thinking skills,
  • Effective interpersonal, teamwork, and communication skills,
  • BS/MS degree in EE/CE or related technical field(s) is required.

Fidus is committed to creating a diverse environment and is proud to be an equal opportunity employer.

Top Skills

Asic
Fpga
Systemverilog
Uvm
Verilog

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