Develop and execute test plans, debug and analyze issues, create test benches, collaborate with cross-functional teams, and participate in design reviews for ASIC/FPGA verification designs at Fidus Systems.

Seeking a highly skilled Senior ASIC Designer to collaborate with cross-functional teams in defining and developing ASIC designs. Responsibilities include writing technical specifications, developing RTL code, and interacting with verification and physical design engineers. Requires expertise in ASIC design methodologies, Verilog, SystemVerilog, UVM, and a degree in EE/CE or related field.