Top Tech Jobs & Startup Jobs in Calgary

Lead end-to-end development of TeraWave FEIC mm-wave chipset family, coordinating internal teams and external vendors from architecture and multi-variant mask planning through tapeout, silicon bring-up, antenna co-development, testing, qualification, and production ramp while managing risks, schedules, and system-level RF interfaces.

Design high-frequency phased array antennas for space communication, including system-level RF architectures and EM simulations, while mentoring others and overseeing hardware lifecycle.

The Senior Director will lead the architecture and development of silicon systems and software for the TeraWave satellite communications network, overseeing teams in silicon systems architecture and embedded/application software.

Lead the design and development of Phase-Locked Loops in advanced CMOS/SiGe processes, focusing on performance optimization for space communication systems.

The Principal RF/mmWave IC Design Engineer at Blue Origin will design advanced RF/mmWave ICs, collaborate on system architecture, and oversee chip-level integration to enable communication in space.

Lead the design and architecture of advanced ASICs for satellite communication systems, ensuring technical leadership and collaboration across multiple disciplines.

Lead mixed-mode design verification methodology for complex SoCs. Define co-simulation EDA environment, create Verilog/SystemVerilog testbenches and behavioral models, support analog/digital teams, and perform AMS simulations for block- and chip-level verification.

Lead design and ownership of system-level integration and test architecture for a satellite communications constellation. Define test strategy, build progressive integrated test facilities (link-level to full-system), integrate ground terminal validation, embed tests in CI/CD pipelines, size and procure major test infrastructure, and collaborate across payload, satellite, and network teams to ensure end-to-end validation, regulatory compliance, and production-scale acceptance testing.

The Senior ASIC Verification Engineer leads verification of complex digital subsystems, develops UVM environments, drives coverage closure, and mentors junior engineers.

Lead verification of complex digital ASIC and SoC designs for space-based communications applications. Define verification strategy, drive development of environments, and manage teams to ensure quality silicon.